**Welcome!**.**The Role and Impact** mixed-signal IP development team as a Senior Mixed Signal Design Engineer. This role combines analog circuit design **Key Responsibilities:** - Execute analog circuit design tasks including simulation setup, testbench development, and schematic optimization using Cadence ADE- Advance verification flows and methodologies supporting evolving mixed-signal design requirements**Core Competencies** Strong analytical and problem-solving skills, alongside effective team collaboration capabilities.***SPECIAL NOTE** - Intel is in the process of securing office space in the greater metropolitan area of Toronto, Ontario.This office will serve as your assigned work location in the future. Once the site is operational, your position will follow Intel’s hybrid work model, which currently requires on-site presence at least four days per week. Until the office is ready, you will be classified as a remote employee and will be working virtually from the greater metropolitan area of Toronto, Ontario.***Minimum Qualifications** Bachelor's degree in Electrical or Computer Engineering or in a STEM related field with 2+ years of industry experience2+ years of experience with mixed signal verification and driving - 2+ years of experience in scripting languages such as Python for automation purposes.- Experience working within mixed signal systems like SerDes or PLLs.Experience with - Experience with Cadence ADE for running simulations and debugging testbenches.- Experience with script development and automation using AI.- Experience with mixed-signal design principles, including interfaces between analog and digital domains.Strong analytical and problem-solving skills, alongside effective team collaboration capabilities.Experience with analog behavioral modeling (Verilog-A, SystemVerilog, etc.) is a plus #J-18808-Ljbffr