About AMD At AMD, our mission is to build great products that accelerate next‑generation computing experiences — from AI and data centers to PCs, gaming and embedded systems. We believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. As an intern, you’ll work at the epicenter of the AI ecosystem, learning new skills and contributing to projects that impact millions of end‑users worldwide. Job Details Location: Vancouver, British Columbia, Canada Work Arrangement: Full time 37.5 hrs per week, hybrid or onsite during co‑op/intern term. Duration: Fall 2026 (4 months September–December or 8 months September–May 2027) What You Will Be Doing Collaborate with Design Engineers on physical design verification and implementation for ASIC. Work on memory interface simulation (GDDR7, HBM, UCIE). Support discrete and embedded hardware products and chip‑to‑chip interconnect. Participate in RTL design in Verilog. Perform synthesis with timing‑driven placement and design for power (DFP). Handle floor planning, power distribution, clock distribution, Block/Chip place & route, EM/IR analysis, timing closure, and Static Timing Analysis. Engage in tasks such as logical equivalent check, RTL clocking analysis, static power analysis, and Design for Test (DFT). Train on building test libraries and models using SystemVerilog, UVM and C++. Who We Are Looking For Currently enrolled in a Canadian university, pursuing a Bachelor's degree in Electrical engineering, Computer engineering or a related field. Knowledge or experience in: Semiconductor device physics Digital/logic circuits and VLSI Verilog or VHDL UVM methodologies Scripting languages (Python, Perl, TCL, Ruby), Shell/Unix scripting, C/C++, MATLAB Machine Learning interest or experience ASIC design Physical design (PD) process Chip level design/integration activities and DFT EEO Statement AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr