Join a highly experienced R&D team dedicated to developing Intellectual Property (IP) for advanced microcontrollers and microprocessors. This team focuses on creating a networking switch and network controller IP core (NETC) that supports the latest TSN standards, forming the networking foundation for NXP's latest microcontrollers, processors, and switches. The IP developed by this team underpins a product portfolio generating billions of USD in annual revenue. The chips you help develop are likely found in the car you drive, the smart devices in your home, and the factories producing the goods you use. Part of AI and Chip Engineering (ACE), a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products. Our expertise spans hardware engineering, including architecture, IP, and full SoC design. Job Description We are seeking a highly motivated Design Verification Engineer with a relentless drive to excel and make a significant impact. Our team offers innovative thinking, engineering expertise, and sustained market leadership in embedded processing. By joining us, you will work with the advanced platforms that NXP delivers to major players in the automotive, industrial, edge, and telecommunication markets, featuring multiple processing cores and high-performance networking accelerators integrated on the same silicon chip. Responsibilities Architect, design, implement, and verify breakthrough Ethernet/networking IP to be integrated into next-generation SoCs for automotive, industrial, and edge computing markets. Responsible for the architecture, design, and implementation of UVM Verification of hardware IP & System on Chip (SoC) products. Perform thorough trade-off analysis on performance and complexity. Work closely with IP architecture, design, and verification teams on planning and execution to ensure the IP is delivered on time and with the highest quality. Produce quality documentation for all phases of the project, including detailed IP functional and implementation specifications. Build the directed and random verification tests Debug test failures to determine the root cause; work with architect and design engineers to resolve defects and correct issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements Proactively drive continuous improvement in design and verification methodology. Job Qualifications 5+ years of experience in IP & System on Chip (SoC) products. Thorough knowledge and expertise in System Verilog and UVM Verification. Strong understanding of IP & SoC development methodology and proficiency in verification tools. Strong Experience in EDA tools and scripting (Python, TCL, Perl, Makefile, Shell) used to build tools and flows for verification environments Strong Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycleExperience with revision control systems like Git Familiarity with hardware and software implementation trade-offs. Focus on quality results with proven problem-solving abilities. Strong interpersonal, communication, and documentation skills. Dynamic team player. Bachelor's degree in Computer Science, Engineering, or a related field. Highly Desirable Skills Familiarity with Formal and Functional Safety Verification. Knowledge of state-of-the-art networking technologies, including TCP/IP protocols. Experience with data products such as routers, bridges, and switches. #J-18808-Ljbffr