Mixed‑Signal Systems and Verification Engineer II ResponsibilitiesBe part of a hands‑on development team that promotes engineering excellence, creativity, and innovation.Develop accurate, simulation‑efficient analog and mixed‑signal behavioral models (RNM) in SystemVerilog.Verify that behavioral models accurately represent analog schematics and design intent.Integrate analog behavioral models with RTL environments.Verify analog and mixed‑signal functionality against specifications using:Assertions, including Analog Assertion‑Based VerificationSupport verification of blocks such as filters, ADC/DAC, VCO, A/DPLL, SerDes, LNA, mixers, and related AMS IP.Debug verification failures across analog, digital, and mixed‑signal domains.Develop and maintain verification infrastructure including testbenches, environments, and scripts.Document modeling assumptions, verification methodology, and results for formal design and verification reviews.Collaborate cross‑functionally with design, systems, and IP teams to understand constraints and ensure verification coverage.Required Qualifications0–2+ years of experience working in digital, analog, or mixed‑signal design and verification environments.Bachelor’s degree in Electrical Engineering or related field.MSEE or PhD preferred.Strong understanding of SystemVerilog and mixed‑signal verification concepts.Experience or coursework in real‑number modeling (RNM) including: wreal.Basic understanding of analog and mixed‑signal blocks such as ADCs, DACs, PLLs, SerDes, RF or signal‑processing components.Familiarity with Cadence Virtuoso Schematic Composer and ADE.Strong written and verbal communication skills with the ability to work across teams.Comfortable working in a fast‑paced, collaborative development environment.Preferred QualificationsExperience scripting verification and design automation flows using Python or Perl.Experience with low‑power architectures.Exposure to SystemVerilog UVM methodologies.Experience with FPGA prototyping.Familiarity with industry standards such as PCIe, USB, DDR, or similar.Knowledge of mixed‑signal Cadence tools and mixed‑signal verification methodologies.Exposure to hardware acceleration platforms such as Palladium or Protium.Experience with revision control systems (e.g., SOS, SVN).wreal.The annual salary range is $73,500—$136,500 CAD. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.Our benefits programs include paid vacation and holidays, leave of absence programs, Registered Retirement Savings Plan (RRSP), Tax Free Savings (TFSA) plan for post‑tax investment savings, Employee Stock Purchase Plan, group health coverage that includes dental, vision and Emotional Wellbeing Support (EAP) benefits for you and your eligible dependents. Cadence also offers employee and dependent Life insurance, and short‑term and long‑term disability. In addition, Cadence provides Global Travel Medical coverage, Business Travel Accident Insurance, and a funded Lifestyle Spending Account (LSA).We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.#J-18808-Ljbffr