What You’ll Be Doing As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator You will be responsible for verification of the ASIC design, architecture, reference models and micro‑architecture using advanced verification methodologies Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks Implement and optimize automated verification flows to improve productivity and efficiency Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process What We Need To See Bachelors Degree in EE, CS or CE (or equivalent experience) and 8+ years of relevant industry experience Background with building block and SoC level testbench utilizing strong debugging and analytical skills Experience in verification using random stimulus along with functional coverage, assertion‑based verification methodologies and tools Expertise in SystemVerilog and Universal Verification Methodology (UVM) Experience with design and verification tools (VCS, Verdi or equivalent) Experience in UPF power verification is a plus Experience in netlist and DFT verification is a plus Perl/Python and C/C++ programming language experience desirable Knowledge of ASIC design flow, from specification to GDS Knowledge of applying machine learning to ASIC verification flow Benefits and Salary With competitive salaries and a generous benefits package, NVIDIA offers a base salary range of 155,000 CAD – 205,000 CAD for Level 4, and 195,000 CAD – 245,000 CAD for Level 5. Equity and additional benefits are also included. Application Deadline Applications for this job will be accepted at least until March 16, 2026. #J-18808-Ljbffr